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| !! " !!!# $ % & & # ' ( )*+,-& -& # % .#*/ 0#$/ ** / #0*/ .#*$/$* / ' # & #$/ 12 .#$/ 12! 3#4 ' # 5 & + 6$7 8 9 $ % ! "!!!( #$/& .#$/ #.:$/;#$74 "!!! <' #0/ 0#$/ vid4 0.1uf 1.9uh + 330uf + 330uf irlr024n vid0 + - lm358 3 2 1 8 4 2.32k + 1500uf vid1 2r2 0.1uf 10 irlr3103n irlr024n 3.3v 0.1uf x4 1.00k irlr024n + 1500uf 2r2 12v 5v + 47uf 1k 1.5v 5mohm 0.1uf vid2 SC1186cs 1 5 6 7 8 9 10 11 15 16 17 18 19 20 21 22 13 12 14 24 2 23 3 4 agnd vcc ldoins en vid4 vid3 vid2 vid1 vid0 gate2 ldov ref cs- cs+ pgndh dh bsth vosense dl pgndl bstl gate1 ldos1 ldos2 x6 + 330uf 0.1uf + 330uf 3.3v vcc_core en vid3 2.5v 12v vlin3 irlr3103n ! " # # $ ! % ! " & ' ( ) ' * + * ! , " # " - - ( . # /0 1 ! - " # " ' ( . # $0 1 ! !" "# $ %& '' '$ ( ) ( " " ( $ 2 ( , ( ( 3 ( 4 3 ( 2 / ( ' * / 25 ( * 5 ( * % / 3 " 6 7 ( ( " - $ 4 % 8 9 : ( " 3 3 ; < ( ( " - = =5 " 1 : 9 : 2 9 9 > 4 2 9 9 2 9 9 " 1 : * : 2 * * > 4 2 * * 2 9 * ) * & + + ' " ; ? 4 $ : * 2 ; ( @ ' ( . - . ' a / /$ 5 ' 4 - - " * " - b $ 2 * * ( = 4 $ $ $% $ $ * ( % = 4 4 ( " c ? c % 4 $ % $ 4 / $ ) * && $ > ) + & $ > ) * = ' ( ' * / 2 5 ( * 5 " ' % 2 + : : " * ( @ ' d * % / ' ( . - . + * = : + * 2 + * 2 + * $ e e ( " @ - c 5 $ 4 %5 3 " . a %- 3 . " ( " . 4% - " ' a ' ( ( f & $ > ) + 2 / : " ' + + : !" "# $ %& '' '$ ( ) !" # ! """ ! " # $ 0 % / 4 $ $ 1 ! $ ! % & ' ' ( ' ( ( ( ( $ + * @ * * c - 4$ *$ * c - ( %7 + ( " c ' c c + * < 3 ( * / & @ ) - = & @ - ) - 9 . " a ' . 9 c ' a 9 @ ' . 9 $ * . " a ' a * c ' a * @ ' a * 4 * @ ' a * c 3 ( 9 @ ' . 9 c 3 ( % + & ) ( c . 9 > @ " . a ' - . - a ( " * + + . " : " , ' c ( c ' / 4 & ) & < ) = & ) $$ & ) $ & ) $ $ & ) & * ) $ * " - * c $ 4 $$ + $ * @ ! # $ 1 2 3 4 5 6 7 8 gate2 agnd top view (24 pin soic) 13 14 15 16 ldov gate1 vid0 ldos1 vid1 ldos2 vid2 vcc vid3 ref vid4 ldoen vosense cs- 9 10 22 en cs+ bsth pgndh 21 18 17 19 20 11 12 24 bstl dh dl pgndl 23 $ % r s q + - 70mv + - + - 2.5v fet controller 1.5v fet controller 1.275v ref error amp d/a shoot-thru control vcc cs- bsth dh pgndh en cs+ bstl dl pgndl vosense ldoen ldos2 vid3 ldos1 vid2 vid1 vid0 agnd ref gate2 gate1 ldov ref vid4 current limit level shift and high side drive synchronous mosfet drive oscillator & * * !" "# $ ) ( +) # &! ' " $ 4 ( & ) & 7 ) " " " ( $ 2 $ $ % $ 4 4 $ 4 4 $ 4 4 % 4 / 4 $ $ % % 4 $ % $ % % % % % $ 4 $ % $ / / / / $ / / = % / / / = = = = = = / = $ $ $ $ $ $ = $ $ = % $ $$ $ % $ $ $ $ $ % % $ $ $ $ 4 % $ 4 $% 4 $ % 4 $ $/ $ % $ % $= % $ % % $ $ 4 $ / $ / $$ 4 / $ $ 4 / $ = $/ = $ 4 = $ % / $ % % $ 4 % $ 4 $ % % $ 4 / % 4 4 ( => #, )*+,- -# 9# # % & # ! & ' 8989& & ( ) " # - # > - 9 ?>!& 9 b & c d 9 - & # 09# b @& @. #! # &+ -?>!# & & # vout 12v in 3.3v vo lin1 vo lin2 5v l 5mohm + cout + cin 10 q2 0.1uf q3 + cout lin1 2.32k q4 + cout lin2 1.00k + cin lin SC1186 agnd 1 vcc 5 ref 6 ldoen 7 cs- 8 cs+ 9 pgndh 10 dh 11 bsth 15 en 16 vosense 17 vid4 18 vid3 19 vid2 20 vid1 21 vid0 22 dl 13 pgndl 12 bstl 14 gate2 24 gate1 2 ldov 23 ldos1 3 ldos2 4 q1 0.1uf heavy lines indicate high current paths. layout diagram SC1186 ( ) " )9 3 89 8 9 & & & - # $9 ( & &@&@. # 1e , 1e 2 +# %1e 8 9 89#! &%1e 3 89&@&@. #f %1e &@&@. # 9 / $/ * & / %1e *# < & # :9 & + g #*# < g # 9!& 2 3 8 9 89# vout 5v + + currents in power section * #a ( & ( #3 ?4 # ' ?4 h step current transient i excursion voltage transient maximum v where i v r t t t t esr = = < ' & ** / *% & ?4 * # + ?4 & # 3 ( . " . " + 3 b ' 6 ( ) & 7 + ) & ) & 7 + ) & ( + a * %% $ $ = = / ( + a * 4 4 / & 2 ?4 % & + # , & ' # ?4' # ' h () o in o a a t esr v v or v of lesser the is v where v i c r l ? ? ' **7 *7 & # $* :$7 ' ?4 & ' # = *7 ' # e ?4#4 h osc in l f l 4 v i ripple ? ? = 4 # & # & # in o ) on ( ds 2 o cond v v cycle duty = where r i p ? ? = 2 in o sw 10 v i p ? ? ? = & 4 f ) t t ( v i p osc f r in o sw ? + ? ? = 9 a & ' & * a # & & # h ) 1 ( r i p ) on ( ds 2 o cond ? ? ? = < ' h 3 + 7 & ) ) & & 0 ) : " $ 4 * $ : $ $ * = $ : 4 4 $ / ? + #< + <4)& . - & )* = %k* = 3 # h ) - & 3 + 7 + 7 + 7 $ 4 * % %$ $ $ * % 4$ 4 4 / / % 4 ! 3))* ( & & ' )# 4> $*7 & # % & & # ( &' & & # ?4 ' - -# 48 9 & & & *# # & #! 8 . 9 /a + # & & & ' ( & # ! & ' & #$/)%( 0#0/;$7& ' 48 9 # 48 9 'l8*#6$m0#0#$9 )n)** .** ' & + ' $% # #+ ? 8 9 4 &/ l.#*/&! l*% .#$/2 4 / l.#)/&! l0** % $% 76% 80% 84% 88% 92% 96% 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 io (amps) efficiency (%) vo=2.8v vo=2.0v vo=2.5v , $ "* 12v 3.3v s1 1 2 3 4 5 6 + c3 1500uf en l2r q3 irlr3103n r7 2r2 c5 0.1uf + c2 1500uf vid1 + c15 330uf r9 2r2 + - u2a lm358 3 2 1 8 4 r16 0 vid2 r12 1k r1 10 j25 c28 0.1uf c1 0.1uf r6 2r2 j20 q1 irlr3103 + c7 1500uf vcc_core r10 2r2 + c12 330uf r8 5mohm vid4 j16 1 2 3 4 j15 + c19 1500uf j13 u1 SC1186cs 1 5 6 7 8 9 10 11 15 16 17 18 19 20 21 22 13 12 14 24 2 23 3 4 agnd vcc ref ldoins cs- cs+ pgndh dh bsth en vosense vid4 vid3 vid2 vid1 vid0 dl pgndl bstl gate2 gate1 ldov ldos1 ldos2 vid0 + c22 1500uf 2.5v vlin1 + c14 330uf j23 j14 + c20 1500uf vid3 r15 see table q2 irlr3103n r18 see table j1 vlin2 r5 2.32k + c6 1500uf + c18 1500uf l1 1.9uh + c8 1500uf + c11 330uf j17 1 2 3 4 r3 empty c13 0.1uf vlin3 + c25 330uf r17 see table j12 c4 0.1uf r4 1.00k 1.5v + c17 330uf + c24 330uf q4 irlr3103n + c9 1500uf + c27 47uf j18 scope tp r11 see table 3.3v 12v + c23 1500uf q5 irlr024n j19 c10 0.1uf q7 irlr024n + c21 1500uf 5v + c16 330uf vid 43210 11111 11110 11101 11100 11011 11010 11001 11000 10111 10110 10101 10100 10011 10010 10001 10000 vout no cpu 2.10 2.20 2.30 2.40 2.50 2.60 2.70 2.80 2.90 3.00 3.10 3.20 3.30 3.40 3.50 vid 43210 01111 01110 01101 01100 01011 01010 01001 01000 00111 00110 00101 00100 00011 00010 00001 00000 vout 1.30 1.35 1.40 1.45 1.50 1.55 1.60 1.65 1.70 1.75 1.80 1.85 1.90 1.95 2.00 2.05 r17 18.7 42.2 97.6 vlin3 1.5v 1.8v 2.5v r18 100 100 100 j24 j22 j21 table valid for 1x5mohm sense resistor droop mv/a 0 1 2 5 1 2 5 1 2 5 r11 (ohm) 0 2.5 3.3 empty 6.3 8.3 empty 12.5 16.7 empty r15 (ohm) empty 10 5 2 25 12.5 5 50 25 10 offset mv/v 0 2 2 2 5 5 5 10 10 10 q6 irlr024n , $ "$ 3 b " c ( - % / $ > > > > 4 > 7 $$ > $ > $ > = > / > = > / > > % > > $ $ > $ $ 7 g < 3 + a * ( @ 6 / $ > 4 $ > > % > > 4 > $ > 7 4 $ 7 4 *9 = %4 4 b > b > $ b > b * b > % b > b 4 $ * / = h < + 4 : 5 : $ $5 $ 4 > = > > % $ $ / . 4 $ > $ ( , $ : % % $ / > ( , / d % / 9 + < + = $ d/ < * ! " #$%&' ()*'+,$*-%%%.#/)*'+,$*-&*', ! - # |
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